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| (R) EMIF02-USB03F2 2 LINES EMI FILTER INCLUDING ESD PROTECTION IPADTM PRODUCT CHARACTERISTICS ESD protection and EMI filtering for: USB OTG port DESCRIPTION The EMIF02-USB03F2 is a highly integrated array designed to suppress EMI / RFI noise for USB OTG (On The Go). The EMIF02-USB03F2 Flip-Chip packaging means the package size is equal to the die size. Additionally, this filter includes an ESD protection circuitry which prevents the protected device from destruction when subjected to ESD surges up to 15 kV on external contacts. BENEFITS 2 lines low-pass-filter + 2 lines ESD protection High efficiency in EMI filtering Lead Free package Very low PCB space consuming: < 3.25 mm2 Very thin package: 0.65 mm High efficiency in ESD suppression (IEC61000-4-2 level 4) High reliability offered by monolithic integration High reducing of parasitic elements through integration and wafer level packaging. COMPLIES WITH THE FOLLOWING STANDARDS: IEC61000-4-2 Level 4 on external pins 15kV (air discharge) 8kV (contact discharge) Level 1 on internal pins 2kV (air and contact discharge) Flip-Chip (11 Bumps) Figure 1: Pin Configuration (ball side) 3 ID 2 Dz 1 A Pd1 Vbus Pup B C D D+ out Dout Pd2 D+ in Din GND Figure 2: Schematic Pup Dz ID Vbus EMIF02-USB03F2 R3=1.3k D+OUT D-OUT C C R2=33 R1=33 D+IN D-IN R5=15k R4=17k Table 1: Order Code Part Number EMIF02-USB03F2 Pd2 Marking FU Pd1 Cline = 20 pF max. TM: IPAD is a trademark of STMicroelectronics. October 2004 REV. 3 1/7 EMIF02-USB03F2 Table 2: Absolute Ratings (Tamb = 25C)) Symbol Parameter and test conditions External pins (D1, C1, A2, A3, B3) ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge Internal pins (D3, C3, C2, B2, B1) ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharg Maximum junction temperature Operating temperature range Storage temperature range Value 15 8 2 2 125 - 40 to + 85 - 55 to + 150 Unit VPP kV Tj Top Tstg C C C Table 3: Electrical Characteristics (Tamb = 25C) Symbol VBR IRM VRM VCL Rd IPP Cline Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Input line capacitance per line Test conditions IR = 1 mA VRM = 3V @ 0V Tolerance 5% Tolerance 5% Tolerance 5% Tolerance 5% Min. 14 Typ. 0.1 33 1.30 17 15 Max. 0.5 20 Unit V A pF k k k Symbol VBR IRM Cline R1,R2 R3 R4 R5 Figure 3: Application Schematic Vbus 3.3V ID Pup Dz ID Vbus Vbus ID USB OTG Xceiver EMIF02-USB03F2 R3=1.3k D+ D- D+OUT D-OUT C C R2=33 R1=33 D+IN D+ D-IN D- R5=15k R4=17k GND Pd2 Pd1 GND R1 = R2 = 33 Cline = 20 pF max. 2/7 USB OTG connector EMIF02-USB03F2 Figure 4: Filtering measurements EMIF02-USB03F2_EVAL-SAMPLES_PM431 Aplac 7.70 User: ST Microelectronics Jul 22 2004 0.00 dB -10.00 Figure 5: Analog crosstalk measurements 0.00 dB -10.00 -20.00 -30.00 EMIF02-USB03F2_EVAL-SAMPLES_PM431 Aplac 7.70 User: ST Microelectronics Jul 22 2004 -20.00 -40.00 -50.00 -30.00 -60.00 -70.00 -40.00 -80.00 -90.00 -50.00 100.0k 1.0M C1/C3 Line 10.0M f/Hz D1/D3 Line 100.0M 1.0G -100.00 100.0k 1.0M C1/D3 Line 10.0M f/Hz 100.0M A2/A3 Line 1.0G Figure 6: ESD response to IEC61000-4-2 (+15kV air discharge) on one input V(in) and on one output (Vout) Figure 7: ESD response to IEC61000-4-2 (-15kV air discharge) on one input V(in) and on one output (Vout) Figure 8: Junction capacitance versus reverse voltage applied (typical values) C(pF) 20 18 16 14 12 10 8 6 4 2 0 0 1 2 3 4 5 6 7 8 9 10 11 12 V R (V) 3/7 EMIF02-USB03F2 Figure 9: Aplac model C3 Ls Port1 50 A3 A2 B3 B2 B1 C2 D2 MODEL = D02_usb03_gnd MODEL = D02_usb03 bulk bulk B2 B1 R_1k3 C3 R_33R R_17k C1 D3 R_33R bulk bulk bulk bulk bulk C2 D2 R_15k D1 Lbump Rbump MODEL = D02_usb03 MODEL = D02_usb03 Cgnd Lgnd bulk Cbump Rsubump A2 Cbump Rsubump B2 Cbump Rsubump C2 Cbump Rsubump C3 Cbump Rsubump B3 bulk A3 bulk D1 Cbump Rsubump bulk bulk D3 Cbump Rsubump bulk bulk C1 Cbump Rsubump bulk bulk B1 Cbump Rsubump bulk bulk bulk Cbump Rsubump bulk bulk Rgnd Rs Lbump Rbump C1 Rbump Lbump Rs Ls Port2 50 Figure 10: Aplac parameters Ls 950pH Rs 150m R_33R 33 R_1k3 1.3k R_15k 15k R_17k 17k Cz_usb03 11pF Rs_usb03 1 Cz_usb03_gnd 220pF Rs_usb03_gnd 0.9 Lgnd 50pH Rgnd 100m Cgnd 0.15pF Lbump 50pH Rbump 20m Cbump 2.4pF Rsubump 100m 4/7 EMIF02-USB03F2 Figure 11: Order Code EMIF EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F = Flip-Chip x = 1: 500m, Bump = 315m = 2: Leadfree Pitch = 500m, Bump = 315m yy - xxx zz Fx Figure 12: FLIP-CHIP Package Mechanical Data 500m 50 315m 50 650m 65 500m 50 1.57mm 50m Figure 14: Foot Print Recommendations 2.07mm 50m Figure 15: Marking 565 400 545 Copper pad Diameter : 250m recommended, 300m max. Solder stencil opening : 330m recommended Dot, ST logo xx = marking z = packaging location yww = datecode (y = year ww = week) E Solder mask opening recommendation : 340m min. for 300m copper pad diameter xxz y ww 100 230 All dimensions in m 5/7 EMIF02-USB03F2 Figure 14: Packing Dot identifying Pin A1 location 4 +/- 0.1 O 1.5 +/- 0.1 1.75 +/- 0.1 3.5 +/- 0.1 0.73 +/- 0.05 All dimensions in mm Table 4: Ordering Information Ordering code EMIF02-USB03F2 Marking FU Package Flip-Chip Weight 4.5 mg Base qty 5000 Delivery mode Tape & reel 7" Note: More packing informations are available in the application note AN1235: "Flip-Chip: Package description and recommendations for use" AN1751: "EMI Filters: Recommendations and measurements" 8 +/- 0.3 ST E ST E ST E xxz yww User direction of unreeling xxz yww xxz yww 4 +/- 0.1 Table 5: Revision History Date 14-Oct-2004 25-Oct-2004 27-Oct-2004 Revision 1 2 3 First issue. Figure 13 on page 5: Flip-Chip marking dimensions updated. Minor layout update. No content change. Description of Changes 6/7 EMIF02-USB03F2 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 7/7 |
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